Non-volatile memory designs continue to improve with technological advancements. Floating gate and MONOS (metal/polysilicon oxide nitride oxide silicon) are types of nonvolatile memories. In conventional floating gate structures, charge is stored on to a floating gate, by either Fowler-Nordheim tunneling or by source side injection. The cell operation is governed by electron charge storage on an electrically isolated floating gate. The amount of charge stored modulates the memory cell's transistor characteristic. Because the only electrical connection to the floating gate is through capacitors, the memory cell can be thought of as a linear capacitor network with an attached N-channel transistor. Any charge present on the floating gate is retained due to the inherent Si—SiO2 energy barrier height, leading to the non-volatile nature of the memory cell.
MONOS memory cells, in comparison to standard floating gate cells, may have faster program times and higher densities. In MONOS memory cells using sidewall spacer structures, a source side electron injection approach is faster and may require lower voltages than electron tunneling methods used for a standard floating gate design. U.S. Pat. No. 6,686,632, to Ogura et al. describes a dual bit MONOS memory having a twin cell structure. The cell structure is realized by placing sidewall control gates over a composite of oxide nitride oxide (ONO). Both sides of a word gate and control gates are formed using a disposable sidewall process. During construction of this device, a sidewall spacer is required for the word gate to accommodate the ONO and source side injection structure.
Newer processes that may be used in non-volatile memory designs also continue to be developed. For example, metal nanocrystal memories have been utilized to enhance the performance of memory cell devices to improve the work function. In a nanocrystal non-volatile storage device, charge is not stored on a continuous floating gate layer. Instead, a large number of discrete mutually isolated nanocrystals are contained on a semiconductor layer. Nanocrystals may be employed in storing small amounts of electrical charge, even being able to store a single, or a small number, of atoms. In theory, smaller transistors may be made because structures containing nanocrystal charge storage “dots” might be made exceedingly small.
A downside to using nanocrystals has been high power consumption due to refresh requirements, short retention time, and high capacitance. U.S. Pat. No. 6,165,842, to Shin et al. describes a method for fabricating a nonvolatile memory device using crystal dots. A tunneling dielectric, a thin amorphous silicon film, a polysilicon layer having nanocrystals, a dielectric layer, and a polysilicon film are formed. The method develops a nonvolatile memory cell gate structure having dimensions limited by the resolution of optics or photoresist materials used in photolithography and must develop a multitude of layers to support and construct a nanocrystal layer.
Such devices are therefore difficult to manufacture because nanocrystals are many times smaller than photolithography resolution limits currently used in manufacturing integrated circuits.